Why are 'tombstoning' created?

Potential causes of tombstoning are broad catalog, including faulty PCB track and pad design, oxidation processes, type of solder paste, template design, and parameters for printing, placing, and reflow soldering processes.

The tombstoning effect is due to slight differences in the wetting force on both sides of the element in the chip housing. As the flux and solder liquefy and wet on both sides of the component, through their surface tension, they exert a small torque on the component. If the torque is sufficiently unbalanced with the mass of the element, the element stands upright, creating a tombstone-like defect protruding above the surface.

• PCB path design - One of the common causes of imbalance in wetting forces is the temperature difference and the flow time difference between the two pads on which the chip is located. An example of such an unfavorable setup, taken from John Vivardi of Nordson EFD's 'Tombstone Troubleshooting', is shown in the figure to the right. The first pad is connected to a wide track that absorbs more heat, while the second pad is connected to a thin track with less thermal mass. As a result, the second pad will be hotter than the first and the paste will flow down faster. If the paste on the second pad is wetted first, the surface tension created on it may be sufficient to overcome the force of the first pad, allowing a tombstone defect to develop.
• The design of the pad also influences the formation of a tombstone defect as well as the rotation of the components. The larger the pad is relative to the size of the element, the greater the leverage that can be produced by the spread of solder. When the pad is too wide, the imbalance between the two sides of the pad can cause the component to skew, while if it is too long, it is easier to leverage, creating a tombstone effect.
• Oxidation of component leads and/or PCBs causes slight delays in the wetting process, and the difference in wetting time between pads can cause a tombstone effect. High-quality PCBs and proper component storage can eliminate this factor.
• Component geometry - capacitors, coils, or other more massive components in a chip housing are statistically more susceptible to the tombstone effect than resistors or other, smaller components because of the distance at which the solder wets the component lead is important. The size and weight of the elements also play an important role: the lighter the element, the less force is needed to create a tombstone defect.
• Solder paste is actually a mixture of two independent materials: flux and alloy. In rare cases, pastes with particularly poor flux do not provide sufficient adhesion just before and during the reflow soldering step. To identify the effect of poor paste quality, parallel paste comparisons are often required.
• With regard to the characteristics of the alloy itself, it turns out that there is a difference in performance between eutectic and non-eutectic alloys. The eutectic alloy changes from solid to liquid over a minimum temperature range, rapidly developing full surface tension. Non-eutectic alloys change state gradually over a certain temperature range, and the surface tension increases over an extended period of time. As a result, non-eutectic alloys such as Sn62 / Pb36 / Ag2 and Sn96 / Ag3.0 / Cu0.5 are less prone to tombstone formation than Sn63 / Pb37 and other eutectic alloys. The greater the melting range, the less likely a tombstone defect will occur.
• The design of the template consists of two elements: the shape of the aperture and the choice of technology for making the template. The shape of the aperture defines two things: the volume of the paste deposit and its location. The proper template design should only provide for the amount of solder paste required. Too much paste means the wrong shape of the deposit and also a greater torque when the solder liquefies. Good design also places the braze in a position that will ensure proper alignment of the component on the deposit. With too little paste applied, insufficient adhesion of the deposit to the pad may occur, while with too much paste, solder balls appear on the sides of the chip. The template manufacturing technology defines the expected paste release properties. Chemically etched stencils, laser-cut stencils, and electroformed stencils are available for increased paste release performance. Electroforming and recoating of chemically etched and laser cut patterns have been proven to improve the release efficiency of the paste.
• One of the factors that drastically reduces the incidence of the tombstone effect is the quality of the print. With more even deposits, the adhesion between the pads is more even. For size 0201 apertures, Type 4 and Type 5 solder pastes significantly improve print quality.
• If the component is placed more on one side or the other during the placement phase, this will allow greater surface tension to be applied to one side. In addition, if the item is not placed with sufficient pressure, it will begin to tilt as the wetting process proceeds, and if pushed too deep into the paste, the paste will move and - again - there may be uneven wetting on both pads.
• The reflow soldering process is perhaps the most important contributor to the tombstone effect. When PCBs designed to favor the tombstone effect go into the reflow oven, the way the PCB is heated can make the tombstone defect problem worse or worse. To minimize the tombstone defect, raise the temperature so that the liquidus of the solder is uniform for all pad pairs on the board. This means that the entire plate should be brought to a temperature just below the liquidus and then slowly lifted to the spreading point. For most products, a temperature rise rate of about 1 ° C per second is a suitable safeguard against the occurrence of a tombstone defect. More difficult products may require a slower rise rate, in some cases as low as 0.33 ° C per second.

Source: https://tek.info.pl/