Gold contamination makes the solders brittle
The most common source of gold contamination of solder is its leaching from component leads.
Gold does not oxidize and at the same time provides a highly solderable protective layer that is easily bonded to gold or aluminum wires used in the key bonding process for the semiconductor industry. As a result, the advantages of gold are a direct reason for the popularity of immersion gold on copper base surfaces. However, because gold is soluble in solder at a relatively low temperature, it readily penetrates the structure of the solder joint, creating a brittle intermetallic layer, and consequently weakening its integrity. If the gold level during the formation of the liquid phase of the solder alloy exceeds certain acceptable values, the composition and mechanical properties of the resulting solder joint may be unfavorably changed.
The brittleness of the gold intermetallic layer in lead-tin soldered joints is a well-recognized mechanism of defect formation. Commonly used lead-free solders, including tin-silver-copper (SAC305) and tin-nickel-copper (SN100C), seem to maintain their mechanical properties better under conditions of gold contamination (this is due to the higher tin content). however, their properties also degrade with increasing gold content.
The brittleness of gold intermetallic layers can be a significant reliability issue, and the risks associated with it depend on several variables, including the amount of gold that is leached from the clad surfaces, the volume of the resulting solder joint, but also the process by which the joints were formed (wave, select or reflow).
In most cases, the source of excessive dissolution of gold is the gold-plated leads of the components, not gold from a PCB finish such as ENIG or ENIPIG. It is commonly believed that these types of tile finishes are usually too thin to really contribute to the brittle intermetallic gold layer. Their average thickness is around 0.10 µm, while the "significance" threshold is considered to be 0.25 µm.
The image shows a eutectic tin-lead microstructure with brittle gold content. Bright areas are Pb, darker areas are Sn phase and intermediate areas are Au-Sn IMC intermetallic layers (mainly AuSn4 and AuSn2). Source: 'Gold Embrittlement of Solder Joints', Ed Hare, Ph.D
Removal of gold
From 2014 revision F up to the current H edition of IPC J-STD-001, it is stated that gold should be removed from:
- at least 95% of the soldered surfaces of the leads of through-hole components (including connectors), covered with a gold layer with a thickness of 2.54 µm or more,
- with 95% of all soldered surfaces of surface components, regardless of the thickness of the gold.
With the above guidelines in mind, gold removal is therefore required for all Class 2 and 3 high-reliability electronic products and therefore applies to almost all systems.
The removal of gold from the leads of the components occurs in a process in which gold is dissolved in the molten solder during the tinning process. It is often a "double" tinning process, which uses two crucibles: one removes gold (and other, possible surface contamination, by the way), the other serves to reapply it to the exposed surface of the component outlet.
The use of a robotic hot dipping process is now generally recommended. The tinning operation should be carried out using a tinning machine with flux control, preheat, and double brazing crucibles, preferably under an inert nitrogen atmosphere.
The inert atmosphere helps to maintain the aesthetic appearance of the resulting solder joint while minimizing the build-up of icicles and slag. The immersion of the flux and solder component output should be controlled to allow the application of the flux and solder to a precisely defined depth. In addition, attention should be paid to the rate of withdrawal of the component from the second solder crucible, which helps to control the thickness of the solder applied in the re-tinning process. Both solder crucibles should be regularly tested for copper, nickel, and other contaminants.